Si53208 8-Output PCIe Gen 1/2/3/4 Fanout Buffer Evaluation Kit
This Si53208-EVB is designed to evaluate the jitter performance, power consumption and signal integrity of Si53208 device for PCIe Gen1/2/3/4 and SRIS. The evaluation board features jumpers and SMA connector for easy static configuration of the control inputs as well we providing a port for external equipment access.
For PCIe compliance report, please download Silicon Labs PCIe Clock Jitter tool.
Each evaluation kit includes one evaluation board, a USB cable, and is designed to verify:
- Performance and compliance of PCI Express Gen 1/2/3/4 and SRIS. For compliance testing, download the Silicon Labs' PCIe Clock JItter tool.
- Connect prototype systems that have SMA connectors for system validation using PCIe Clock Jitter tool.
- Device power consumption
- Individual output enable (OE) for power management