Si5325x Automtive Grade PCIe Gen 1/2/3/4/5 Fanout Buffer Development Kit


This Si53258-A-EVB is designed to evaluate the jitter performance, power consumption and signal integrity of the Si53258 device for PCIe Gen1/2/3/4/5 applications. The evaluation board features jumpers and SMA connector for easy static configuration of the control inputs as well providing a port for external equipment access.

For PCIe compliance report, please download Silicon Labs PCIe Clock Jitter tool.


Si53258-A-EVB 8-Output Development Kit Features

Each evaluation kit includes one evaluation board, a USB cable, and is designed to verify:

  • Performance and compliance of PCI Express Gen 1/2/3/4 and SRIS. For compliance testing, download the Silicon Labs' PCIe Clock JItter tool.
  • Connect prototype systems that have SMA connectors for system validation using PCIe Clock Jitter tool.
  • Device power consumption
  • Individual output enable (OE) for power management

Si53258-A-EVB 8-Output Development Kit Resources

Si53258-A-EVB User's Guide

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Si53258/4 Data Sheet

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Si53258-A-EVB Schematic and Layout Files

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AN946: PCI-Express Gen 4 Jitter Requirements

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AN871: Driving Long PCIe Clock Lines

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AN1104: PCIe Gen 4 Time Domain Measurements and Analysis

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