|
|
ARM Cortex-M4
|
40
|
128
|
16
|
1 x I²C
1 x I²S
2 x SPI
3 x UART
2 x USART
|
-30
20
|
8.4
|
-126.2 (600 bps GFSK 915 MHz)
|
8.5
|
0
|
|
|
|
AES-128
AES-256
ECC
SHA-1
SHA-2
|
16
|
12-bit, SAR, 1 Msps
|
VDAC
|
|
|
8
|
|
2
|
-40
85
|
QFN32
|
5x5
|
JTAG, SW
|
|
|
ARM Cortex-M4
|
40
|
128
|
16
|
1 x I²C
1 x I²S
2 x SPI
3 x UART
2 x USART
|
-30
20
|
8.4
|
-126.2 (600 bps GFSK 915 MHz)
|
8.5
|
0
|
|
|
|
AES-128
AES-256
ECC
SHA-1
SHA-2
|
32
|
12-bit, SAR, 1 Msps
|
VDAC
|
|
|
8
|
|
2
|
-40
85
|
QFN48
|
7x7
|
JTAG, SW
|
|
|
ARM Cortex-M4
|
40
|
256
|
32
|
1 x I²C
1 x I²S
2 x SPI
3 x UART
2 x USART
|
-30
20
|
8.4
|
-126.2 (600 bps GFSK 915 MHz)
|
8.5
|
0
|
|
|
|
AES-128
AES-256
ECC
SHA-1
SHA-2
|
16
|
12-bit, SAR, 1 Msps
|
VDAC
|
|
|
8
|
|
2
|
-40
85
|
QFN32
|
5x5
|
JTAG, SW
|
|
|
ARM Cortex-M4
|
40
|
256
|
32
|
1 x I²C
1 x I²S
2 x SPI
3 x UART
2 x USART
|
-30
20
|
8.4
|
-126.2 (600 bps GFSK 915 MHz)
|
8.5
|
0
|
|
|
|
AES-128
AES-256
ECC
SHA-1
SHA-2
|
32
|
12-bit, SAR, 1 Msps
|
VDAC
|
|
|
8
|
|
2
|
-40
85
|
QFN48
|
7x7
|
JTAG, SW
|
|
|
ARM Cortex-M4
|
40
|
256
|
32
|
1 x I²C
1 x I²S
2 x SPI
3 x UART
2 x USART
|
-30
20
|
8.4
|
-126.2 (600 bps GFSK 915 MHz)
|
8.5
|
0
|
|
|
|
AES-128
AES-256
ECC
SHA-1
SHA-2
|
16
|
12-bit, SAR, 1 Msps
|
VDAC
|
|
|
8
|
|
2
|
-40
125
|
QFN32
|
5x5
|
JTAG, SW
|
|
|
ARM Cortex-M4
|
40
|
256
|
32
|
1 x I²C
1 x I²S
2 x SPI
3 x UART
2 x USART
|
-30
20
|
8.4
|
-126.2 (600 bps GFSK 915 MHz)
|
8.5
|
0
|
|
|
|
AES-128
AES-256
ECC
SHA-1
SHA-2
|
32
|
12-bit, SAR, 1 Msps
|
VDAC
|
|
|
8
|
|
2
|
-40
125
|
QFN48
|
7x7
|
JTAG, SW
|
|
|
ARM Cortex-M4
|
40
|
128
|
16
|
1 x I²C
1 x I²S
2 x SPI
3 x UART
2 x USART
|
-30
19
|
10.2
|
-103.3 (250 kbps DSSS-OQPSK 2.4 GHz)
|
8.5
|
0
|
|
|
|
AES-128
AES-256
ECC
SHA-1
SHA-2
|
16
|
12-bit, SAR, 1 Msps
|
VDAC
|
|
|
8
|
|
2
|
-40
85
|
QFN32
|
5x5
|
JTAG, SW
|
|
|
ARM Cortex-M4
|
40
|
128
|
16
|
1 x I²C
1 x I²S
2 x SPI
3 x UART
2 x USART
|
-30
19
|
10.2
|
-103.3 (250 kbps DSSS-OQPSK 2.4 GHz)
|
8.5
|
0
|
|
|
|
AES-128
AES-256
ECC
SHA-1
SHA-2
|
31
|
12-bit, SAR, 1 Msps
|
VDAC
|
|
|
8
|
|
2
|
-40
85
|
QFN48
|
7x7
|
JTAG, SW
|
|
|
ARM Cortex-M4
|
40
|
256
|
32
|
1 x I²C
1 x I²S
2 x SPI
3 x UART
2 x USART
|
-30
19
|
10.2
|
-103.3 (250 kbps DSSS-OQPSK 2.4 GHz)
|
8.5
|
0
|
|
|
|
AES-128
AES-256
ECC
SHA-1
SHA-2
|
16
|
12-bit, SAR, 1 Msps
|
VDAC
|
|
|
8
|
|
2
|
-40
85
|
QFN32
|
5x5
|
JTAG, SW
|
|
|
ARM Cortex-M4
|
40
|
256
|
32
|
1 x I²C
1 x I²S
2 x SPI
3 x UART
2 x USART
|
-30
19
|
10.2
|
-103.3 (250 kbps DSSS-OQPSK 2.4 GHz)
|
8.5
|
0
|
|
|
|
AES-128
AES-256
ECC
SHA-1
SHA-2
|
31
|
12-bit, SAR, 1 Msps
|
VDAC
|
|
|
8
|
|
2
|
-40
85
|
QFN48
|
7x7
|
JTAG, SW
|
|
|
ARM Cortex-M4
|
40
|
128
|
16
|
1 x I²C
1 x I²S
2 x SPI
3 x UART
2 x USART
|
-30
19
|
8.4
|
-126.2 (600 bps GFSK 915 MHz); -103.3 (250 kbps DSSS-OQPSK 2.4 GHz)
|
8.5
|
0
|
|
|
|
AES-128
AES-256
ECC
SHA-1
SHA-2
|
28
|
12-bit, SAR, 1 Msps
|
VDAC
|
|
|
8
|
|
2
|
-40
85
|
QFN48
|
7x7
|
JTAG, SW
|
|
|
ARM Cortex-M4
|
40
|
256
|
32
|
1 x I²C
1 x I²S
2 x SPI
3 x UART
2 x USART
|
-30
19
|
8.4
|
-126.2 (600 bps GFSK 915 MHz); -103.3 (250 kbps DSSS-OQPSK 2.4 GHz)
|
8.5
|
0
|
|
|
|
AES-128
AES-256
ECC
SHA-1
SHA-2
|
28
|
12-bit, SAR, 1 Msps
|
VDAC
|
|
|
8
|
|
2
|
-40
85
|
QFN48
|
7x7
|
JTAG, SW
|